In recent years, heterojunction bipolar transistors have been used as the transistors that form a power amplification module of mobile terminals and so forth. This type of bipolar transistor is called a heterojunction bipolar transistor (HBT).
An example of a semiconductor device that includes such a bipolar transistor will be described. As illustrated in FIGS. 27, 28 and 29, in a bipolar transistor, a sub-collector layer 102 is formed so as to contact a semi-insulating GaAs substrate 101 and a collector layer 103 is formed so as to contact the sub-collector layer 102. A base layer 104 is formed so as to contact the collector layer 103 and an emitter layer 105 is formed so as to contact the base layer 104.
An emitter electrode 106 is formed so as to contact the emitter layer 105. A base electrode 107 is formed so as to contact the base layer 104. A collector electrode 108 is formed so as to contact the sub-collector layer 102. A first insulating film 109 is formed so as to cover the emitter electrode 106, the base electrode 107, the collector electrode 108 and so forth.
First wiring lines 111a, 111b and 111c are formed so as to contact the first insulating film. The first wiring line 111a is electrically connected to the emitter electrode 106, the first wiring line 111b is electrically connected to the base electrode 107 and the first wiring line 111c is electrically connected to the collector electrode 108 via first openings 110 formed in the first insulating film 109. A second insulating film 112 is formed so as to cover the first wiring lines 111a, 111b and 111c. 
A second wiring line 114 is formed so as to contact the second insulating film. The second wiring line 114 is electrically connected to the emitter electrode 106 via a second opening 113 formed in the second insulating film 112. A passivation film 115 is formed so as to cover the second wiring line 114.
A pillar bump 120 is formed so as to contact the passivation film 115. The pillar bump 120 has a multilayer structure consisting of underbump metal 117, a metal post 118 and solder 119. The pillar bump 120 is electrically connected to the second wiring line 114 via a third opening 116 formed in the passivation film 115. The third opening 116 is formed such that the entirety of the bipolar transistor is located inside the region of the third opening 116. A bipolar transistor of the related art is formed as described above.
In a semiconductor device that includes such a bipolar transistor of the related art, the entirety of the bipolar transistor is disposed inside the region of the third opening 116 and as a result the pillar bump 120 is located directly above the emitter layer 105 with the emitter electrode 106, the first wiring line 111a and the second wiring line 114 interposed therebetween.
Consequently, the pillar bump 120 is disposed directly above the collector layer 103 etc., which are directly below the emitter layer 105 and are sources of heat in the bipolar transistor, and thermal resistance can be made small by making the distance from the collector layer 103 etc., which are directly below the emitter layer 105, to the pillar bump 120 be substantially as short as possible. As a result, heat generated in the bipolar transistor is caused to effectively radiate to the pillar bump 120 and an increase in the junction temperature of the bipolar transistor can be suppressed.
Japanese Unexamined Patent Application Publication No. 2003-77930 is an example of a document that discloses a semiconductor device in which a stud bump is disposed directly above a bipolar transistor as a bump.